Over the last several decades, significant advancements in personal computer (PC) microprocessor architecture and fabrication techniques provide improved performance, while controlling costs. With each successive generation, an increasing number of functions are integrated into a processor integrated circuit die. This increase in density is enabled by shrinking the size of the constituent transistor elements to allow more transistors per unit area on the die. Performance improvements are obtained by, for example, increasing the clock frequency at which certain functions of the processor operate. As a result, each successive generation of such processors is more powerful from a total performance standpoint, while increasing overall power consumption.
The power consumption of a processor is proportional to a product of its power supply voltage and current. Successive generations of processors with increasing transistor density operating at higher speeds (e.g., higher clock frequency) demand a lower power supply voltage but higher power supply current. For example, in the early days of microprocessors offered by Intel Corp. of Santa Clara, Calif., transistor count per die was in the low 100,000s, processor clocks were running at around 100 MHz, supply voltages were at 5V DC, and supply current was no more than 10A (depending on the activity level of the processor). With more recent Pentium class processors, transistor count per die is well above 1 million, clocks are in the GHz range, the power supply voltage is dropped to about 1.2V DC or less, while current draw (at high activity levels) easily surpasses 100A.
The supply voltage is regulated to stay within a certain range in the presence of operating temperature variations and as the processor transitions between different activity levels. However, the smaller supply voltages results in tighter ranges requirement, in the face of large current swings. This results in many challenges to providing low cost power delivery for advanced processors.
To ensure reliable power delivery for its microprocessor families, Intel has set voltage regulator design guidelines. A voltage regulator (VR) is an electronic circuit that draws current from a power source to feed the processor and maintain a well-regulated power supply voltage for the processor. The VR maintains a set-point voltage (e.g., at a so-called “Vcc” node of the processor,) using a feedback control loop that repeatedly senses deviations from the set-point, and corrects for them by increasing or decreasing the amount of current drawn from the source. For greater power conversion efficiency, switching-type regulators are used that draw current from the source using transistor or similar devices that turn on and off at high rates and stay on for relatively short pulses. The set-point voltage is maintained by suitably controlling the pulse widths or duty cycle.
Conventional switching VRs for high performance processors have more than two phases or paths to the power source, through which current is drawn to maintain the supply voltage. The multiple phases help reduce the magnitude of voltage and current ripple, which enables the use of smaller phase inductors and power transistor switches, as well as smaller filtering and decoupling components at the output of the VR. In addition, a multi-phase switching VR can respond quickly to deviations from the set-point voltage (both voltage droops and voltage spikes) to help maintain the smaller supply voltages within tighter tolerance bands.
Conventional multi-phase VRs have a fixed phase-switch frequency. The phases are all fired at the same frequency, but time shifted relative to each other. For example, a 100 kHz two-phase regulator will have both phases switching at 100 kHz, with the assertion edges of the two phases separated by five microseconds (one-half the switching period). This approach, however, is problematic when the load current to the VR (for example, the power supply current to a processor) is in essence synchronized to the switching frequency. For instance, a periodic load of five microseconds high current, five microseconds low current creates a serious current imbalance in the two-phase 100 kHz VR. If left unchecked, the current imbalance may quickly reach the per-phase current-limit and usually lead to some form of automatic shutdown of the VR, which may cause the CPU to shutdown unexpectedly, leading to system problems. Some VR implementations do not have a per phase over-current limit/protection. As a result, such VR implementation are susceptible to catastrophic thermal failure (not recoverable) when on one phase as it takes all the current (current imbalance) meant to be shared among all the other phases.
There are conventional schemes to reduce the fatal current imbalance, where such schemes typically rely heavily on bulk capacitance at the output, to reduce the need for temporal alignment of current into the VR versus current out of the VR. In one case, a phase current is compared with an average current (that represents the average current amongst all of the phases), and the duty cycle is controlled on that basis to minimize the difference of current in each phase.